Course Detail
Course Description
Course | Code | Semester | T+P (Hour) | Credit | ECTS |
---|---|---|---|---|---|
DIGITAL MİCROELEKTRONIC DESIGN | EEE4112633 | Fall Semester | 3+0 | 3 | 6 |
Course Program | Perşembe 12:00-12:45 Perşembe 13:30-14:15 Perşembe 14:30-15:15 |
Prerequisites Courses | |
Recommended Elective Courses |
Language of Course | English |
Course Level | First Cycle (Bachelor's Degree) |
Course Type | Elective |
Course Coordinator | Assist.Prof. Mustafa AKTAN |
Name of Lecturer(s) | Assist.Prof. Mustafa AKTAN |
Assistant(s) | |
Aim | At the end of this class, students will understand the impact of digital circuit design choices on speed, power, and cost. In addition, students will be able to make appropriate trade-offs, using back-of-the-envelope circuit analysis. They will be familiar with options for designing interconnect, data-paths, and specialpurpose digital circuits. They will be able to apply modern design methods and use industry-standard tools. They will be able to design a digital integrated circuit from specification, verify their design, and provide oral and written reports on their work. |
Course Content | This course contains; Course Overview – Introduction,Circuits and Layout,CMOS transistor theory,DC response of CMOS gates,Transient response of CMOS gates,Logical effort theory,Logical effort theory,Power analysis of CMOS circuits,CMOS Sequential Circuits,Interconnect analysis and engineering,Adder architectures and design,Standard cell/gate design,Datapaths,Other circuit families. |
Dersin Öğrenme Kazanımları | Teaching Methods | Assessment Methods |
1. Circuits and layout 2. CMOS transistor theory, non-ideal transistor characteristics 3. DC and transient response of digital circuits 4. Logical effort theory 5. Power analysis of digital circuits 6. Combinational circuit elements design in CMOS technology 7. Sequential circuit elements design in CMOS technology 8. Interconnects 9. Adder/subtractor circuits 10. Datapaths | 17, 2, 21, 9 | A, E, F |
Teaching Methods: | 17: Experimental Technique, 2: Project Based Learning Model, 21: Simulation Technique, 9: Lecture Method |
Assessment Methods: | A: Traditional Written Exam, E: Homework, F: Project Task |
Course Outline
Order | Subjects | Preliminary Work |
---|---|---|
1 | Course Overview – Introduction | Lecture Notes, Related Book Chapter |
2 | Circuits and Layout | Lecture Notes, Related Book Chapter |
3 | CMOS transistor theory | Lecture Notes, Related Book Chapter |
4 | DC response of CMOS gates | Lecture Notes, Related Book Chapter |
5 | Transient response of CMOS gates | Lecture Notes, Related Book Chapter |
6 | Logical effort theory | Lecture Notes, Related Book Chapter |
7 | Logical effort theory | Lecture Notes, Related Book Chapter |
8 | Power analysis of CMOS circuits | Lecture Notes, Related Book Chapter |
9 | CMOS Sequential Circuits | Lecture Notes, Related Book Chapter |
10 | Interconnect analysis and engineering | Lecture Notes, Related Book Chapter |
11 | Adder architectures and design | Lecture Notes, Related Book Chapter |
12 | Standard cell/gate design | Lecture Notes, Related Book Chapter |
13 | Datapaths | Lecture Notes, Related Book Chapter |
14 | Other circuit families | Lecture Notes, Related Book Chapter |
Resources |
Textbook: Integrated Circuit Design, 4th Ed., (Weste& Harris, Addison Wesley, 2011) Tools: Cadence Virtuoso schematic/ layout editor, Cadence ADE, Mentor Graphics Calibre DRC and LVS and PEX |
Course Contribution to Program Qualifications
Course Contribution to Program Qualifications | |||||||
No | Program Qualification | Contribution Level | |||||
1 | 2 | 3 | 4 | 5 | |||
1 | An ability to apply knowledge of mathematics, science, and engineering | ||||||
2 | An ability to identify, formulate, and solve engineering problems | ||||||
3 | An ability to design a system, component, or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability, and sustainability | X | |||||
4 | An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice | X | |||||
5 | An ability to design and conduct experiments, as well as to analyze and interpret data | X | |||||
6 | An ability to function on multidisciplinary teams | ||||||
7 | An ability to communicate effectively | ||||||
8 | A recognition of the need for, and an ability to engage in life-long learning | ||||||
9 | An understanding of professional and ethical responsibility | ||||||
10 | A knowledge of contemporary issues | ||||||
11 | The broad education necessary to understand the impact of engineering solutions in a global, economic, environmental, and societal context |
Assessment Methods
Contribution Level | Absolute Evaluation | |
Rate of Midterm Exam to Success | 30 | |
Rate of Final Exam to Success | 70 | |
Total | 100 |
ECTS / Workload Table | ||||||
Activities | Number of | Duration(Hour) | Total Workload(Hour) | |||
Course Hours | 14 | 3 | 42 | |||
Guided Problem Solving | 4 | 2 | 8 | |||
Resolution of Homework Problems and Submission as a Report | 7 | 6 | 42 | |||
Term Project | 2 | 2 | 4 | |||
Presentation of Project / Seminar | 2 | 2 | 4 | |||
Quiz | 2 | 2 | 4 | |||
Midterm Exam | 1 | 24 | 24 | |||
General Exam | 1 | 46 | 46 | |||
Performance Task, Maintenance Plan | 3 | 2 | 6 | |||
Total Workload(Hour) | 180 | |||||
Dersin AKTS Kredisi = Toplam İş Yükü (Saat)/30*=(180/30) | 6 | |||||
ECTS of the course: 30 hours of work is counted as 1 ECTS credit. |
Detail Informations of the Course
Course Description
Course | Code | Semester | T+P (Hour) | Credit | ECTS |
---|---|---|---|---|---|
DIGITAL MİCROELEKTRONIC DESIGN | EEE4112633 | Fall Semester | 3+0 | 3 | 6 |
Course Program | Perşembe 12:00-12:45 Perşembe 13:30-14:15 Perşembe 14:30-15:15 |
Prerequisites Courses | |
Recommended Elective Courses |
Language of Course | English |
Course Level | First Cycle (Bachelor's Degree) |
Course Type | Elective |
Course Coordinator | Assist.Prof. Mustafa AKTAN |
Name of Lecturer(s) | Assist.Prof. Mustafa AKTAN |
Assistant(s) | |
Aim | At the end of this class, students will understand the impact of digital circuit design choices on speed, power, and cost. In addition, students will be able to make appropriate trade-offs, using back-of-the-envelope circuit analysis. They will be familiar with options for designing interconnect, data-paths, and specialpurpose digital circuits. They will be able to apply modern design methods and use industry-standard tools. They will be able to design a digital integrated circuit from specification, verify their design, and provide oral and written reports on their work. |
Course Content | This course contains; Course Overview – Introduction,Circuits and Layout,CMOS transistor theory,DC response of CMOS gates,Transient response of CMOS gates,Logical effort theory,Logical effort theory,Power analysis of CMOS circuits,CMOS Sequential Circuits,Interconnect analysis and engineering,Adder architectures and design,Standard cell/gate design,Datapaths,Other circuit families. |
Dersin Öğrenme Kazanımları | Teaching Methods | Assessment Methods |
1. Circuits and layout 2. CMOS transistor theory, non-ideal transistor characteristics 3. DC and transient response of digital circuits 4. Logical effort theory 5. Power analysis of digital circuits 6. Combinational circuit elements design in CMOS technology 7. Sequential circuit elements design in CMOS technology 8. Interconnects 9. Adder/subtractor circuits 10. Datapaths | 17, 2, 21, 9 | A, E, F |
Teaching Methods: | 17: Experimental Technique, 2: Project Based Learning Model, 21: Simulation Technique, 9: Lecture Method |
Assessment Methods: | A: Traditional Written Exam, E: Homework, F: Project Task |
Course Outline
Order | Subjects | Preliminary Work |
---|---|---|
1 | Course Overview – Introduction | Lecture Notes, Related Book Chapter |
2 | Circuits and Layout | Lecture Notes, Related Book Chapter |
3 | CMOS transistor theory | Lecture Notes, Related Book Chapter |
4 | DC response of CMOS gates | Lecture Notes, Related Book Chapter |
5 | Transient response of CMOS gates | Lecture Notes, Related Book Chapter |
6 | Logical effort theory | Lecture Notes, Related Book Chapter |
7 | Logical effort theory | Lecture Notes, Related Book Chapter |
8 | Power analysis of CMOS circuits | Lecture Notes, Related Book Chapter |
9 | CMOS Sequential Circuits | Lecture Notes, Related Book Chapter |
10 | Interconnect analysis and engineering | Lecture Notes, Related Book Chapter |
11 | Adder architectures and design | Lecture Notes, Related Book Chapter |
12 | Standard cell/gate design | Lecture Notes, Related Book Chapter |
13 | Datapaths | Lecture Notes, Related Book Chapter |
14 | Other circuit families | Lecture Notes, Related Book Chapter |
Resources |
Textbook: Integrated Circuit Design, 4th Ed., (Weste& Harris, Addison Wesley, 2011) Tools: Cadence Virtuoso schematic/ layout editor, Cadence ADE, Mentor Graphics Calibre DRC and LVS and PEX |
Course Contribution to Program Qualifications
Course Contribution to Program Qualifications | |||||||
No | Program Qualification | Contribution Level | |||||
1 | 2 | 3 | 4 | 5 | |||
1 | An ability to apply knowledge of mathematics, science, and engineering | ||||||
2 | An ability to identify, formulate, and solve engineering problems | ||||||
3 | An ability to design a system, component, or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability, and sustainability | X | |||||
4 | An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice | X | |||||
5 | An ability to design and conduct experiments, as well as to analyze and interpret data | X | |||||
6 | An ability to function on multidisciplinary teams | ||||||
7 | An ability to communicate effectively | ||||||
8 | A recognition of the need for, and an ability to engage in life-long learning | ||||||
9 | An understanding of professional and ethical responsibility | ||||||
10 | A knowledge of contemporary issues | ||||||
11 | The broad education necessary to understand the impact of engineering solutions in a global, economic, environmental, and societal context |
Assessment Methods
Contribution Level | Absolute Evaluation | |
Rate of Midterm Exam to Success | 30 | |
Rate of Final Exam to Success | 70 | |
Total | 100 |